Powerlattice, a Vancouver, Wash.-based startup developing chips that cut the power demands of AI processors, has raised $86 million, according to an SEC filing on Friday.
The new funding is nearly triple the $31 million the company had raised when it emerged from stealth last November with a $25 million Series A led by Playground Global and Celesta Capital. Board members include former Intel CEO Pat Gelsinger, a general partner at Playground, and Steve Fu of Celesta.
The filing shows Powerlattice is seeking $111 million, with 18 investors participating so far. It does not name the investors or the round. The company declined to comment.
AI chips are drawing so much electricity and throwing off so much heat that data center operators are running into limits on available power and cooling.
“AI is not constrained by capital, it’s constrained by power,” Gelsinger said last year when Powerlattice announced its Series A.
Powerlattice makes what it calls a power delivery chiplet, a small component that sits inside the processor package. Conventional setups route current over long paths to the processor, wasting energy along the way. The company says shortening that path can cut energy use by more than half and boost performance. Powerlattice said last year it was providing engineering samples for GPUs, CPUs and custom accelerators.
CEO Peng Zou, Gang Ren and Sujith Dermal founded the company in 2023. The three are semiconductor veterans whose backgrounds span Qualcomm, Intel and NUVIA, a startup Qualcomm acquired in 2021. Powerlattice also has offices in Chandler, Ariz.; San Jose, Calif.; and Hsinchu, Taiwan.
Earlier this week, Powerlattice announced it had demonstrated what it calls the industry’s first monolithic integrated voltage regulator chiplet, which packs the controller, power transistors and inductors onto a single piece of silicon.
In the test, the chiplet powered a device Powerlattice built to mimic the fast-shifting electrical loads of next-generation AI accelerators. The company says multiple chiplets can be linked to work as one, letting chip designers match the setup to their processors.
“Breaking through the AI power wall requires us to rethink how power reaches the processor,” Zou said in the announcement.
